Novi Sad, Serbia, Sept 29 - Oct 2, 2017
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Keynote / Invited Talks

Prof. Jordi Carrabina, Autonomous University of Barcelona (Spain)

Jordi Carrabina, Prof. T., PhD. Leads the CEPHIS kaboratory at Universitat Autònoma de Barcelona (Spain). Main interests are Physically and Functionally flexible platforms and solutions for the implementation of Cyber-physical Systems using Reconfigurable computing and Printed Microelectronics Technologies.

He is Teaching Telecom, EE, and CS and MA of Telecom Engineering at UAB and Embedded Systems Master at UPV-EHU. During last 5 years he has co-authored more 30 papers in journals and conferences. He also leaded many European, national and regional R&D projects and contracts in the ICT domain and is active in the creation of spin-off and Intellectual Property items.

"Printed Electronics: A design perspective"

Through the years, we have observed the continuously increase of the scientific, technological and industrial activity in the area of Printed Electronics, understood as flexible circuits integrating different active and passive devices in a low-cost solution with some digital printing and chip hybridization capabilities. Nowadays, there are some key applications that already found the market niches (such as OLED displays and lighting, electrophoretic displays, organic photovoltaics, RFID tags).

Through this evolution, some of us expected that the maturity of the technology would move from a technology-driven vertical business model to an application-driven (wider and segmented) horizontal one, as it happened in both the printed circuit board and the microelectronics industries. As for now, this is not yet true, so there is less room for accessing printed electronics technologies that would allow building applications by designers from fab-less industries.

This design perspective requires abstracting non-relevant technological details. This will be analyzed following one example that covers the whole chain: from technology to circuits, through building a Design Kit on an EDA tool that contains design rules and simulation models. On top of those, designers can build new devices, cells and circuits. We will provide special focus on the Inkjet-configurable Gate Arrays (IGA), a new concept that includes photolithographic processes for building devices and deep metallization layers together with digital printing to build upper metal layers for circuit personalization.

Guilhem Velve Casquillas, Elvesys (France )

Dr Guilhem Velve Casquillas is a former physics researcher who created several hardware technological start up. He is founder and CEO of ELVESYS Microfluidic Innovation Center SAS, and co-founder of Black Hole Lab SAS,  E-Brumair SAS and Cherry Biotech SAS.

Guilhem Velve Casquillas is in charge of ELVESYS management as well as the support of the sisters companies arising from ELVESYS. Inside of ELVESYS, he is also in charge of the R&D on the scientific projects with strong potential of creation of new companies. Notably, he’s PhD thesis enabled the development of the world fastest pathogenic detection system (FASTGENE technology). In 2014, this FASTGENE project won the Worldwide 2030 Innovation Contest organized by the French government.

Guilhem is a member of "Réseau Entreprendre" (Undertake Network) and also gives voluntary entrepreneurship lessons inside research institutes in order to help young scientists create their enterprise.

"Inputs on hard-tech startup inception in the twenty-first century"

Did you ever wonder how and why Apple, in just three decades, became the most valorized company in the world? And how in seven years, Uber was valorized by half the total of all US airline companies?

Successful entrepreneurial methods and tools were revolutionized for both software and hardware innovative companies. During this presentation, we will look at the changes that took place since the seventies.

This will take us to the birth of the Venture Capital Funds by Georges Doriot, post-World War 2, an industry that boomed in the nineties. We will look at how online tools allow entrepreneurs today to reach their market worldwide for only a few euros. We will see how this changes the commercial growth dynamic of our hardware startups but also how it changes the way we do research and development today.

This new paradigm gives our entrepreneurial generation, for the first time in human history, the possibility to create, from nothing and in just a few decades, a world-leading company in its field.

Prof. Fernando Corinto, Politecnico di Torino (Italy)

Prof. Fernando Corinto received the Masters' Degree in Electronic Engineering and the Ph.D. degree in Electronics and Communications Engineering from the Politecnico di Torino, in 2001 and 2005 respectively. He also received the European Doctorate from the Politecnico di Torino, in 2005. F. Corinto was awarded a Marie Curie Fellowship in 2004.
He is currently Associate Professor of Circuit Theory with the Department of Electronics and Telecommunications, Politecnico di Torino. His research activities are mainly on nonlinear circuits and systems, locally coupled nonlinear/nanoscale networks and memristor nanotechnology.

Prof. Corinto is co-author of 6 book chapters and more than 130 international journal and conference papers. Since 2010, he is Senior Member of the IEEE. He is also Chair of the IEEE CAS Technical Committee on "Cellular Nanoscale Networks and Array Computing" and member of the IEEE CAS Technical Committee on "Nonlinear Circuits and Systems". Prof. Corinto serves as Vice-Chair of the IEEE North Italy CAS Chapter. Prof. Corinto has been Associated Editor of the IEEE Trans. on Circuits and Systems - I for 2014-2015. He is also in the Editorial Board and Review Editor of the International Journal of Circuit Theory and Applications since January 2015. Prof. Corinto is Vice Chair of the COST Action "Memristors -- Devices, Models, Circuits, Systems and Applications (MemoCiS)". Prof. Corinto has been DRESDEN Senior Fellows at the Technische Universitat Dresden in 2013 and 2017. Prof. Corinto has been August- Wilhelm Scheer visiting professor at Technische Universitat Munchen in 2016 and he is also member of the Institute for Advanced Study -Technische Universitat Munchen.

"Computing with Bio–inspired Memristor Networks: Complexity and Nonlinear Dynamics via the Flux–Charge Analysis Method"

Dr. Slobodan Mijalkovic, Silvaco Europe, Cambridge, (UK)

Dr. Slobodan Mijalkovic is a Senior R&D Engineer at Silvaco Europe in Cambridge (UK), specialized in modeling for computer-aided design on process, device and circuit level. Before joining Silvaco Europe, he was a Principal Researcher in HiTeC Laboratory at Delft University of Technology in the Netherlands, where he led a team for standardization of the Mextram bipolar transistor model with Compact Model Coalition (CMC). Formerly, he was Assistant and Associate Professor with the Department of Microelectronics at Faculty of Electronics Engineering, University of Nis in Serbia.

Dr. Mijalkovic has authored more than 80 publications and a monograph “Multigrid Methods for Process Simulation” in the Springer book series “Computational Microelectronics”. He has set and chaired four editions of “Compact Modeling for RF Application (CMRF)” workshops that strongly contributed to the acceptance of Verilog-A as a standard HDL for compact modeling. He is currently a member of IEEE EDS Compact Modeling Committee.

"Advanced TFT Modeling for Technology and Circuit Design"

The well-established amorphous and polycrystalline silicon TFTs are increasingly struggling to meet the modern display design requirements. Rapidly emerging oxide and organic semiconductor TFTs appear to be new leading technologies for the next generation post-silicon displays. Some potential applications of the oxide and organic TFTs are also going far beyond display circuits, promising to become essential technology for future printed, flexible and neuromorphic electronic systems.

New models are required on two different levels to support electronic design automation of present and future oxide and organic TFT technology and circuits. Optimization of a TFT architecture and fabrication technology at device level requires physical TCAD models for charge distribution and carrier transport in oxide and organic semiconductors. On the other hand, efficient and accurate compact models are required to support simulation of oxide and organic TFT circuits. A range of peculiar features of charge distribution and transport in oxide and organic TFTs require special modeling consideration. The advanced TCAD models for oxide and organic TFTs will be demonstrated in simulation case studies including a mixed-mode simulation as a methodology to fulfill common device-circuit design objectives. A full-range charge-based TFT compact modelling approach, suitable for both oxide and organic TFTs, will be demonstrated in practical applications to TCAD generated and measured oxide and organic TFT static and dynamic electrical characteristics.

Dr. Mirjana Videnovic-Misic, University of Novi Sad (Serbia)

Dr. Mirjana Videnovic-Misic received her PhD degree from the University of Novi Sad, Serbia, in 2009. From 2010 to 2016 Dr. Videnovic-Misic was Assistant Professor at the Department of Electronics, Faculty of Technical Sciences, Novi Sad, Serbia. She was Fulbright Visiting Scholar at UC Berkeley from 09/2014-06/2015. Since July 2015 she is Marie Currie Fellow under the guidance of Professor Borivoje Nikolic. Dr. Videnovic-Misic was working at Berkeley Wireless Research Center (09/2014-01/2017) and R&D ST Microelectronics enter in Crolles, France (01/2017-06/2017). She is currently working on the next generation blocker resilient receiver topologies for full-duplex application. Her research interest includes noise modelling of submicron components, design and optimization of analog and radio-frequency integrated circuits for the next generation mobile devices.

 "Analogue design optimization techniques for 5G in 28nm FD-SOI"

Peter Mueller, IBM Zurich Research Laboratory (Germany)

Peter Mueller joined IBM Research as a Research Staff Member in 1988. His research expertise covers a broad range of areas from nanoscience to device physics, simulation, and computer technology. In nanoscience, his main experience is in the fields of scanning tunneling microscopy (STM) and atomic force microscopy (AFM), including specialized techniques such as z-V spectroscopy, STM-induced luminescence (STL) and STM- excited cathodoluminescence, in ultrahigh vacuum (UHV) or an electrochemical environment. Much of his experimental work has been carried out on organic materials, using highly customized instrumentation.

He also served as government counsel and as program chair in international conferences and workshops. He is member of the Electrochemical Society (ECS), the Swiss Physical Society (SPS), and IEEE.

"Next Generation Processing - Quantum Computing"

Recent announcements show that Quantum Computing is becoming a reality. This talk will report on the current state of the art and present the architecture of one of IBM’s quantum-processing devices that is publicly accessible in the cloud. The concept of how to create a program on such an architecture will be demonstrated.

Dr. Yervant Zorian, Synopsys (USA)

Dr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops.

Dr. Zorian holds 35 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia's National Medal of Science.

He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.

"Challenges and Solution in Today’s Safety Critical SOCs"


East-West Design & Test 2017 Design Automation Department 2017