• Fabian Vargas

• Jack Arabian

• Yervant Zorian  

• Zainalabedin Navabi

• Ricardo Reis

• Liviu Miclea

• Ilia Polian

• Cecilia Metra

• Virendra Singh

• Mick Austin

• Rich Goldman

• Paolo Prinetto

• Adit Singh

• Svetlana Efimova & Irina Selezneva - Kaspersky Academy, Russia

Fabian Vargas

"Fault-Detection Capability Analysis of a Hardware-Scheduler IP-Core In Electromagnetic Interference Environment"

Fabian Luis Vargas received his B.S. degree in EE from the Catholic University (PUCRS), Brazil, in 1988, the M.Sc. degree in CS from the Federal University of Rio Grande do Sul (UFRGS), also in Brazil, in 1991, and the Ph.D. degree from the Institut National Polytechnique de Grenoble (INPG), France, in 1995. Since 1996 he is Associate Professor at the Catholic University (PUCRS). In 1997 he founded and chaired for six years the Latin American Group of the IEEE Computer Society - Test Technology Technical Council (LA-TTTC). In 2000, he created the 1^st IEEE Latin American Test Workshop (LATW). His research interests include On-Line Testing and Robust Hardware-Software Co-design for Embedded Systems. Prof. Vargas is a Golden Core Member of the IEEE Computer Society.

As founder of Comparative Management Associates, LLC Jack Arabian provides process mapping, modeling and simulation on a contract, consulting basis. He has trained many corporate groups on the topics of process improvement, process mapping and simulation, software and hardware defect detection and correction, engineering design and applications, manufacturing, & finance.

His forthcoming book, Process Modeling & Simulation for All Organizations, will be his fourth, including Computer Integrated Electronics Manufacturing and Testing, and Concurrent and Comparative Discrete Event Simulation, the standard references for manufacturing engineers and designers of automated factories.

In a distinguished career with such innovative companies as Westinghouse, Polaroid, Foxboro Company, and Digital Equipment Corporation, Jack led the design and development of highly successful hardware and software products in the aerospace systems industry. He has built, led, and mentored high performance design and engineering teams, and taken technology from the laboratory to the customer, with consistently high levels of success in terms of both product quality and profitability.

At the MIT Instrumentation Laboratory, Jack played a key leadership role in solving the problem of gyroscope drift in space navigation. The results proved critical to the success of the lunar landing program, including the safe return of Apollo 13 after a crippling explosion, and later to the development of commercial aircraft inertial navigation systems.

At both Foxboro Company and Polaroid, Jack developed innovative automated test equipment that allowed the restructuring of complex factory production lines, doubling both production and quality while decreasing time to market by as much as 30%.

While at Digital, Jack was instrumental in testing computers through modeling and simulation programs, a technique that developed a reputation and a book on the subject. This technique is now used to enhance and accelerate process development and reengineering.

A graduate of Harvard University (B.A., Engineering Sciences and Applied Physics) and Massachusetts Institute of Technology (M.S., Instrumentation), Jack has extensive global experience. He is proficient in five languages, including Armenian, Japanese, Spanish, and French.

In addition to his four books, Jack is the author of numerous papers on a wide variety of technical and managerial topics, a frequent after-dinner speaker, and a presenter at leading international conferences, such as the IEEE International Test Conference, and symposia.

Dr. Yervant Zorian has served as Virage Logic’s Vice President and Chief Scientist since joining the company in 2000.  Prior to that, Dr. Zorian served as a Distinguished Member of the Technical Staff at Lucent Technologies, Bell Laboratories and Chief Technical Advisor to LogicVision.

Dr. Zorian also serves as the Vice President of the IEEE Computer Society for Conferences and Tutorials and is the Editor-in-Chief Emeritus of IEEE Design & Test of Computers. He founded and presently chairs the IEEE 1500 standardization working group for embedded core test, and has authored over 250 papers and four books. Dr. Zorian has received a number of best paper awards, is an honorary doctor of the National Academy of Sciences of Armenia, is a Fellow of the IEEE, and is the recipient of the 2005 IEEE Industrial Pioneer Award.

Dr. Zorian received an MSc degree from the University of Southern California, and a Ph.D. from McGill University.

Zainalabedin Navabi

"Beyond RTL: ESL Design Methodology, Simulation, Synthesis, and Test"

Zainalabedin Navabi, Ph.D. is professor of electrical and computer engineering at Northeastern University and the author of Verilog Digital System Design and both editions of VHDL: Analysis and Modeling of Digital Systems, all published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition, and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system design automation.  In 1978 he developed an HDL simulator and in 1980 he developed an HDL synthesis tool synthesizing to sea-of-gates.  He has served as a consultant and a trainer for several EDA companies. He has trained and consulted several teams of engineers in charge of developing HDL-based tools and environments. Dr. Navabi is a member of ACM, IEEE, IEEE Computer Society, and is an active participant in the IEEE DASC committee that sets standards related to hardware description languages.

Ricardo Reis is Full Professor and the Head of the Microelectronics Graduate Program at Federal University of Rio Grande do Sul - UFRGS. He is presently Vice-President of IEEE Circuits and Systems Society. He received the Electrical Engineering from the (UFRGS), Porto Alegre, Brazil, in 1978. In 1983, he received the Ph. D. degree from the Polytechnic Institute of Grenoble (INPG), France. His primary research interests include Physical Design Automation and Methodologies, CAD tools, Circuits Tolerant to Radiation, VLSI Design Methodologies and Microelectronics Education. He has published more than 250 hundred papers in journals and conferences proceedings (like IEEE Design & Test, ACM TODAES, IEEE JSSC, ISCAS, SBCCI, PATMOS, VLSI-SoC, DAC, DATE, ICCD, CICC, ASP-DAC, LATW). He is also author or co-author of several books. He got also some papers awards and he received an award as research of the year from the Fapergs (Science Foundation of Rio Grande do Sul), 2002. Silver Core award from IFIP. Ricardo Reis is research level 1A of the CNPq (Brazilian National Science Foundation) and head of several research projects supported by Government Agencies and Industry. Past head of the Graduate Program in Computer Science at UFRGS, where is a thesis advisor. He served as a General Chair or Program Chair of several conferences like the IFIP/IEEE VLSI-SoC, IEEE ISVLSI, IEEE LASCAS, Symposium on Integrated Circuits and Systems Design (SBCCI) and Congress of the Brazilian Microelectronics Society (SBMIcro). He is Past President of the Brazilian Computer Society and Past Vice-President of the Brazilian Microelectronics Society. Ricardo is member of the Editorial Board of IEEE Design&Test and chair of the Steering Committee of the IFIP/IEEE VLSI-SoC series of conferences. He is also member of the CEDA Technical Activities Committee. Ricardo Reis is a senior member of IEEE.

Liviu Miclea

"Encryption Algorithms for Structured Systems"

Liviu Miclea was born in Unirea, Romania, on the 11th of January, 1959. Mr. Miclea graduated the Faculty of Automation and Computer Science of the Technical University of Cluj Napoca in 1984 and earned his PhD in Automatic Systems in 1995, at the same university. Between 1984 and 1995, he worked as Engineer, Scientific Researcher and Senior Researcher at the Institute for Automation IPA Bucharest, Cluj-Napoca subsidiary, working in the testing field. From 1995 until 2004 he taught Reliability and Diagnosis, as Assistant and Associate Professor, at the Automation Department of the Technical University of Cluj-Napoca. Since 2004, he is full professor at the same department. Currently, he is the Head of the Automation Department at the Technical University of Cluj-Napoca. He is author or co author of 15 books, 39 research works and more than 100 scientific publications (of which in 39 as unique or first author). His research interests include: design for testability, automatic testing, computer aided design, distributed systems, agent systems. Dr. Miclea is member and liaison for Romania of IEEE TTTC (IEEE Test Technology Technical Council), member of IEEE Computer Society, IFAC Romania and the Romanian Society of Automatics and Technical Informatics SRAIT. In 2008, he received Meritorius Service Award from the IEEE Computer Society, for his fructuous IEEE activity. He is regular co chairman of the bi annual IEEE AQTR conference and often reviews IEEE ITC, ETW and VLSI conference papers.

Ilia Polian

"Modeling faults in reversible circuits"

Ilia Polian is Full Professor and Chair of Computer Engineering at University of Passau, Germany. He received his PhD degree from the University of Freiburg in 2003. Prof. Polian’s research interests include dependability, robustness and resilience of micro- and nanoelectronic circuits and systems on their basis. He serves on numerous program committees, was the Finance Chair of IEEE European Test Symposium 2007 (ETS’07) in Freiburg, the Vice Program Chair of the IEEE Reliability-Aware System Design and Test Workshop 2010 (RASDAT’10) in Bangalore and is the General Chair of ITG/GI/GMM Reliability and Test Workshop 2011 (TUZ’11) in Passau. He is the Student Activities Chair of the IEEE Test Technology Technical Council (TTTC).

Cecilia Metra

"Secure Communication Protocol for Wireless Sensor Networks"

Cecilia Metra is an Associate Professor in Electronics of the University of Bologna (Italy). She obtained the degree (summa cum laude) in Electronic Engineering and the PhD degree in Electronic Engineering and Computer Science from the University of Bologna (Italy). From 1998 to 2001, she has also been Visiting Scholar at the University of Washington, Seattle (USA), while in 2002 she has been Visiting Faculty Consultant for Intel Corporation, Santa Clara (CA). Dr. Metra is General Co-Chair of the "The IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems" 2005 and Program Co-Chair of the "IEEE Int. On-Line Testing Symposium" 2005. She has been General Co-Chair/Program Co-Chair of the "IEEE Int. On-Line Testing Symposium", 2004, 2003, the "IEEE Int. On-Line Testing Workshop", 2002, 2001 and "The IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems", 1999, 1998. She serves/served as Topic Chair for several international conferences, including the International Test Conference and the Design, Automation and Test in Europe (DATE) Conference. She is/has been Member of the Technical Program Committee of several International Conferences, including the IEEE VLSI Test Symposium, the IEEE European Test Symposium, The IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems, the IEEE Int. Workshop on Memory Technology, Design, and Testing (MTDT), the IEEE Int. Workshop on Silicon Debug and Diagnosis and the IEEE Int. Workshop on Infrastructure IP. She a Member of the Editorial Board of the IEEE "Transactions on Computers", the "Microelectronics Journal" (Elsevier Science) and the "Journal of Electronic Testing: Theory and Applications (JETTA)" (Springer). She has been Guest Co-Editor for several Special Issues of international journals and magazines, including the IEEE Transactions on Computers, the IEEE Design & Test and the Journal of Electronic Testing: Theory and Applications (JETTA). She received an IEEE Computer Society Certificate of Appreciation in 2000 and 2004. She is/has been responsible of research contracts in collaboration with several international companies and research centers, including the Philips Research Labs (Eindhoven, The Netherlands), STMicroelectronics, the Italian Space Agency and Alstom Transport. In 2005 and 2004 she received a research grant (2005, 2004) and an equipment grant (2004) from Intel Corporation (Santa Clara, CA). Research Interests and Activities: Design and Test of Digital Systems; Reliable and Error Resilient Systems; Fault Tolerance; On-Line Testing; Fault Modeling; Concurrent Diagnosis.

Virendra Singh

"Energy-Efficient Fault Tolerance: A Microarchitectural Solution for Chip Multiprocessors"

Virendra Singh obtained Ph.D in Computer Science from Nara Institute of Science and Technology (NAIST), Nara, Japan in 2005. He received B.E and M.E in Electronics and Communication Engineering from Malaviya National Institute of Technology (MNIT), Jaipur, India in 1995 and 1997 respectively. Currently, he is a faculty member at Supercomputer Education and Research Centre (SERC), Indian Institute of Science (IISc), Bangalore since May 2007. He served Central Electronics Engineering Research Institute (CEERI),Pilani, India as a Scientist for 10 years prior to join IISc. He also served as a faculty at Department of Computer Science, Banasthali University from June 1996 to March 1997. His research interests are testing and verification of high performance processors, VLSI testing, formal verification, fault tolerant computing, high performance computer architecture, embedded system design, and design for reliability, complexity of test generation algorithms. He is a member of the IEEE, the ACM, the VSI, and lifemember of the IETE. He is a PC member of many conferences. He is aco-founder of RASDAT (Reliability Aware System Design and Test)workshop.

Mick Austin

"Cluster test alternatives using boundary-scan technology"

Mick Austin has been working in the board and system level testing for more than 25 years. Currently Mick is working in Technical sales and Marketing for JTAG Technologies. His role here is to advise current and future customers on how to implement a sound Board test strategy using among other tactics Boundary Scan technology. Previously Mick has worked in Tellabs collaborating with R&D to make new board designs both testable and manufacturable. During his time at Tellabs he also carried out Distance studying at the University of Glamorgan, where he obtained an MSc in Electronics and Information Technology. Before this he also worked on testing of commercial flight simulators for the airline industry and carrying out repairs of the first commercially available Personal computers. Mick is an active member of the board of the Nordic Test Forum and helps to organise the annual Test Forum event held in different Nordic countries towards the end of each year.

Rich Goldman

"An Update on The Semiconductor Industry Landscape: Disaster Averted"

Rich Goldman is the vice president of Corporate Marketing and Strategic Alliances for Synopsys and CEO of Synopsys Armenia, which the National Assembly of The Republic of Armenia proclaimed the best company in the country in 2005. His current responsibilities include Marketing Communications, Public Relations, Events, Creative Services, Web, Market Research, Executive Speaking placement and preparation, Community and Employee Communications, Strategic Alliances, University Programs, Standards, and Industry Relations. He is the Chairman of the Board of the Synopsys Outreach Foundation and of the Synopsys Charitable Foundation for Armenia. Rich is a guest Professor at the Chinese Academy of Science, and is a Commissioner of the Advanced SOC Design Joint Lab Academic Committee there. He is an honorary Professor at Moscow Institute of Electronic Technologies. He is a trustee of the State Engineering University of Armenia and the SEUA Foundation and was awarded the highest award from both Yerevan State University, and the State Engineering University of Armenia, the Gold Medal, for his contributions to technology education in Armenia. In 2009, Rich received the ‘Andranik Ozanyan’ Gold Medal of the Republic of Armenia Ministry of Defense. In 2010 he was awarded the Medal of Honor, the highest award of European Regional Educational Academy (ERIICTA). With the President of Armenia, Rich established and awards the annual Presidential IT Awards to honor that country’s top engineering students. Rich conceived of and serves as cochairman of The President of Armenia’s Award for Outstanding Contribution to Humanity Through IT. Rich is the cofounder and cochairman of ArmTech Congress, the official high tech business conference of the government of Armenia. Designated as the ‘Man of the Year 2008 in Armenia’, he recently received a citation from the National Academy of Sciences of the Republic of Armenia. Rich is President of the Organizing Committee of the Armenian Microelectronics Olympiad. In 2005-2009 he chaired the DAC pavilion panels committee. He is a member of the Syracuse University Society of Fellows, and an Honored Member of the Russian Armenian University Friendship Club. Rich currently serves on the Board of Directors of the Silicon Valley Technical Institute and the board of editors of ‘Economics’ Magazine. Prior to joining Synopsys eighteen years ago, Rich managed the ASIC library and design support software group while at Texas Instruments for 10 years. Rich started up TI ASIC’s Bangalore, India operation. Prior to TI, Rich worked at IBM, developing the digital simulator, AUSSIM. Rich has been active in standards organizations such as Accellera, EDIF, IEEE, Si2 and OVI for more than 20 years. Rich chaired the EDIF Technical Committee, co-chaired the RAPID Board of Directors, and was a member of the EIA/EDIF Steering Committee and Si2 Board of Directors. Currently, Rich chairs the EDAC Interoperability Committee. Rich earned a BSCS from Syracuse University, an MBA and MS Engineering Management from The University of Dallas, and an honorary Doctorate from The State Engineering University of Armenia. In 2009 Rich was presented the Award of the President of Armenia for his significant contribution to the establishment of the Annual Educational Award of the President of Armenia for the best IT Students.

Paolo Prinetto

"Sign Language Synthesis Using Hand Motion Acquisition"

Paolo Prinetto is a full professor of computer engineering at Politecnico di Torino, Italy, and a joint professor at the University of Illinois at Chicago. His research interests include testing, test generation, BIST, and dependability. Prinetto received an MS in electronic engineering from Politecnico di Torino. He is a Golden Core Member of the IEEE Computer Society and the elected chair of the IEEE Computer Society Test Technology Technical Council.

Adit Singh

"The Emerging Adaptive Test Methodology"

Adit Singh received the B.Tech from IIT Kanpur, and the M.S. and Ph.D. from Virginia Tech, all in Electrical Engineering. Currently he is James B. Davis Professor of Electrical and Computer Engineering at Auburn University. Earlier, he has held faculty positions at the University of Massachusetts, Amherst and Virginia Tech in Blacksburg. His research interests span high performance VLSI systems, IC and SOC testing, and microelectronic system reliability and fault tolerance. He has published extensively in these areas, holds several international patents that have been licensed to industry. He is particularly recognized for his pioneering contributions to statistical methods in test and adaptive testing. In addition to extensive support from US sources such as the National Science Foundation, his collaborative research with international scholars has also been supported by the Max Plank Society of Germany, and the Fulbright Foundation. He is a very popular lecturer and over the years has been invited to present over sixty technical courses at international conferences, and in-house in companies. Dr. Singh currently serves as Chair of the IEEE Test Technology Technical Council, and on the editorial boards of IEEE Design and Test Magazine and the Journal of Test and Test Applications (JETTA). He is a Fellow of the IEEE, and a “Golden Core” member of the IEEE Computer Society. In the past he has also held leadership positions in dozens of technical meetings and conferences, including serving as General Chair for the 2000 IEEE VLSI Test Symposium, the 2003 IEEE Defect Based Test Workshop, and the 2004 IEEE Memory Test Workshop.

Svetlana Efimova & Irina Selezneva - Kaspersky Academy, Russia

"IT Security Development by Kaspersky Academy"

Kaspersky Lab is an international group that employs over 2,000 highly-qualified specialists, has central office in Moscow, as well as regional headquarters overseeing the activities of local representatives & partners in five global regions: Western Europe; Eastern Europe; the Middle East & Africa; North & South America; the Asia-Pacific region; and Japan. The company currently works in more than 100 countries across the globe and has its own territory offices in 27 countries. Over 300 million people worldwide are protected by Kaspersky Lab products & technologies, including users of third-party products that incorporate the Kaspersky Lab Anti-Virus Engine. Kaspersky Lab’s corporate client-base exceeds 200,000 companies located around the globe, ranging from small & medium-size businesses right up to large governmental & commercial organizations. The company is paying a lot of attention for academy partner network development introducing its own educational programs & initiatives. The number of Kaspersky Lab customers & partners is growing every day.